Introduction

The current pulse provided by the semiconductor radiation detector (sensor) is amplified and shaped in the front-end electronics. Different modes of signal acquisition are possible: current mode, voltage mode or charge-integration mode. An example of front-end electronics using the charge-integration mode with a charge sensitive amplifier is schematically shown in the following figure.

A current signal generated in the silicon strip/pixel detector is integrated in a charge sensitive preamplifier. At the output of the preamplifier one obtains a voltage step with amplitude proportional to the total charge generated in the detector. The voltage step is fed to the main amplifier called a shaper, which provides pulse shaping according to the timing requirements and the filtration of noise to maximize the signal to noise ratio. Further processing of the shaped signal can be done in different ways depending on specific applications. Possible options are schematically shown in the above figure. The first one is based on so-called binary readout architecture. In that case the comparator detects the presence of the signal of amplitude above the preset threshold and in response provides 1-bit yes/no information. The second way of processing the shaped signal employs an analog-to-digital converter (ADC), where the amplitude of the signal corresponding to each individual photon is measured, and then the information is stored and used for off-line processing. The third option is used for timing measurements - determination of the time of occurrence.

• Low-noise readout ASIC for CZT detectors

  A 64-channel analog front-end readout ASIC matching CZT pixel detector is developed. After testing, the equivalent noise charge (ENC) of single readout channel is 66 e - + 14 e - / PF. The channel inconsistency error is less than 3% and the power consumption is 6 mW / channel. Under irradiation of Am-241 source, the energy spectrum resolution is less than 4.6% (2.7 keV, FHWM) @ 59.5keV. The above performance meets the requirements of engineering applications.

Low-noise readout ASIC for Si-PIN detectors

Since 2017, a low-noise photon-counting front-end readout ASIC matching Si PIN detector has been developed. After testing, the input range is 2 ~ 15fC. The power consumption is only 1.25 mW/channel. The best ENC is 60 e- + 4 e- / PF. It can be applied to the readout of Si-PIN detector with large detector capacitance (20 pF). The lower limit of detection energy is 5 keV. The ASIC product has been applied to an electronic personal dosimeter.

Pixel readout ASIC for hybrid X-ray imaging pixel detector

Since 2019, a pixel readout ASIC in CMOS 180 nm Technology is designed for silicon pixilated detector in the color CT imaging applications. The pixel pitch of our first prototype is 75 μm and the array size is 32×32. The single-channel readout circuit is based on the charge-sensitive amplifier with threshold-over-time discriminators. The input charge range is 0~10 fC and the gain is about 60 mV/fC.The ENC of the readout circuit is less than 110 e- at the power condition of ~ 42μW/pixel. The layout of the pixel readout circuits and the whole chip is the following figure.

Science and technology awards

“Design techniques of 12-bit 2.5MS/s integrated multi-channel single-ramp ADC for imaging detector system” won the 2012 Andy Chi Best Paper Award of IEEE Instrumentation & Measurement Society.

“Key techniques and applications of front-end readout electronics chips for photon and particle detector " won the special prize of science and technology in universities of Shaanxi Province in 2021.